2004年

学術論文 / Journal Papers

1. K. Fukuda, T. Yoshida, T. Shimura, K. Yasutake, and M. Umeno,
   "Synchrotron X-Ray Topography of Lattice Undulation of Bonded Silicon-On-Insulator Wafers,"
   Jpn. J. Appl. Phys., 43, 1081-1087 (2004).
2. K. Yasutake, H. Ohmi, H. Kakiuchi, H. Watanabe, K. Yoshii, and Y. Mori,
   "Size and Density Control of Crystalline Ge Islands on Glass Substrates by Oxygen Etching,"
   Jpn. J. Appl. Phys., 43, L1552-L1554 (2004).
3. M. Miyamura, K. Masuzaki, H. Watanabe, N. Ikarashi, and T. Tatsumi,
   "Origin of Flatband Voltage Shift in Poly-Si/Hf-Based High-k Gate Dielectrics and Flatband Voltage Dependence on Gate Stack Structure,"
   Jpn. J. Appl. Phys., 43, 7843-7847 (2004).
4. H. Watanabe, M. Saitoh, N. Ikarashi, and T. Tatsumi,
   "High-quality HfSi_xO_y gate dielectrics fabricated by solid phase interface reaction between physical-vapor-deposited metal–Hf and SiO₂ underlayer ,"
   Appl. Phys. Lett., 85, (3) 449-451 (2004).
5. K. Fukuda, T. Yoshida, T. Shimura, K. Yasutake, and M. Umeno,
   "Residual order within thermally grown amorphous SiO₂ on crystalline silicon,"
   Phys. Rev. B, 69, (8) 085212 (2004).
6. T. Shimura, K. Fukuda, K. Yasutake, and M. Umeno,
   "Characterization of SOI wafers by synchrotron X-ray topography,"
   Eur. Phys. J. Appl. Phys., 27, 439-442 (2004).

国際学会 / International Conferences

1. K. Takahashi, K. Manabe, T. Ikarashi, N. Ikarashi, T. Hase, T. Yoshihara, H. Watanabe, T. Tatsumi and Y. Mochiznki,
   "Dual Workfunction Ni-Silicide/HfSiON Gate Stacks by Phase-Controlled Full-Silicidation (PC-FUS1)'TechniqUe for 45nm-node LSTP and LOP Devices,"
   2004 IEEE International Electron Devices Meeting (IEDM), 7.4,
   (San Francisco, CA, USA, December 13-15, 2004).
2. N. Umezawa, K. Shiraishi, T. Ohno1, H. Watanabe, T. Chikow, K. Torii, K. Yamabe, K. Yamada, H. Kitajima and T. Arikado,
   "Intrinsic Effect of a Nitrogen Atom for Reduction in Leakage Current through Hf-based High-k Gate Dielectrics - Nitrogen Induced Atomistic Cutoff of “O Vacancy Mediated Leakage Paths","
   The 35th IEEE Semiconductor Interface Specialists Conference (SISC), Late News Poster #2,
   (San Diego, CA, USA, December 9-11, 2004).
3. T. Shimura, E. Mishima, K. Fukuda, K. Yasutake, and M. Umeno,
   "Development of characterization technique of SOI wafers by synchrotron X-ray topography,"
   The 4th International Symposium on Advanced Science and Technology of Silicon Materials, K-5,
   (Kailua-Kona, HI, USA, November 22-26, 2004).
4. M. Saitoh, N. Ikarashi, H. Watanabe, S. Fujieda, H. Watanabe, T. Iwamoto, A. Morioka, T. Ogura, M. Terai, and K. Watanabe,,
   "1.2nm HfSiON/SiON stacked gate insulators for 65nm-node MISFETs,"
   2004 International Conference on Solid State Devices and Materials (SSDM 2004), pp.38-39, B-1-5,
   (Tower Hall Funabori, Tokyo, Japan, September 15-17, 2004).
5. K. Takahashi, K. Manabe, A. Morioka, T. Ikarashi, T. Yoshihara, H. Watanabe, and T. Tatsumi,
   "High Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics,"
   2004 International Conference on Solid State Devices and Materials (SSDM 2004), pp.22-23, A-2-3,
   (Tower Hall Funabori, Tokyo, Japan, September 15-17, 2004).
6. K. Manabe, K. Takahashi, T. Ikarashi, A. Morioka, H. Watanabe, T. Yoshihara and T. Tatsumi,
   "Fully Silicided NiSi Gates on HfSiON Gate Dielectrics for Low Power Application,"
   2004 International Conference on Solid State Devices and Materials (SSDM 2004), pp.18-19, A-2-1,
   (Tower Hall Funabori, Tokyo, Japan, September 15-17, 2004).
7. Y. Yasuda, N. Kimizuka, T. Iwamoto, S. Fujieda, T. Ogura, H. Watanabe, T. Tatsumi, I. Yamamoto, K. Ita, H. Watanabe, Y. Yamagata, and K. Imai,
   "A 65nm-node LSTP (Low Standby Power) Poly-Si/a-Si/HfSiON Transistor with High I_on-I_standby Ratio and Reliability,"
   2004 Symposia on VLSI Technology and Circuits, pp.40-41,
   (Honolulu, HI, USA, June 15-19, 2004).
8. M. Miyamura, M. Masuzaki, H. Watanabe, N. Ikarashi, and T. Tatsumi,
   "Origin of Flatband Voltage Shift in Poly-Si/Hf-based High-k Gate Dielectrics and Vfb Dependence on Gate Stack Structure,"
   The 2004 International workshop on "Dielectric Thin Films for Future ULSI Devices: Science and Technology" (IWDTF-04), Session 1,
   (National Museum of Emerging Science and Innovation (Miraikan), Tokyo, Japan, May 24-28, 2004).
9. K. Tatsumura, T. Watanabe, I. Ohdomari, T. Chikyow, T. Shimura, M. Umeno,
   "Residual Order within Thermally Grown SiO₂ on Si(113) Substrate,"
   The 2004 International workshop on "Dielectric Thin Films for Future ULSI Devices: Science and Technology" (IWDTF-04), Session 5,
   (National Museum of Emerging Science and Innovation (Miraikan), Tokyo, Japan, May 24-28, 2004).
10. H. Watanabe, M. Saitoh, N. Ikarashi, and T. Tatsumi,
    "High Quality HfSixOy Gate Dielectrics Fabricated by Solid Phase Reaction Between Metal Hf and SiO₂ Underlayer
    2004 MRS Spring Meeting, D7.7,
    (San Francisco, CA, USA, April 12-16, 2004).

国内学会 / Domestic Conferences

1. 渡部 平司,
   "高誘電率 (high-k) 膜形成技術の現状と今後の展望,"
   第４回インテリジェント・ナノプロセス研究会, pp.47-55,
   (東北大学 流体科学研究所, December 20, 2004).
   
2. 小山 晋、中嶋 大貴、南 綱介、大参 宏昌、渡部 平司、安武 潔、森 勇藏,
   "大粒径多結晶Si薄膜作製のためのGe微結晶核を利用した基板表面制御,"
   薄膜材料デバイス研究会　第1回研究集会予稿集「TFTのすべて」, PR07, PS11,
   (あすなら会議場, 奈良市, November 12-13, 2004).
   
3. 三島 永嗣，志村 考功，安武 潔，梅野 正隆,
   "放射光X線トポグラフィによる薄膜SOIウエハの同心円状パターンの解析,"
   2004年秋季 第65回応用物理学関係連合講演会予稿集, 3p-P11-6,
   (東北学院大学, September 1-4, 2004).
4. 清水 教弘，本林 久良，志村 考功，安武 潔,
   "1.55μｍ波長帯フォトディテクター用SGOI 薄膜の開発,"
   精密工学会2004年度関西地方定期学術講演会, B-13,
   (関西大学, July 27-28, 2004).
5. 三島 永嗣，志村 考功，安武 潔，梅野 正隆,
   "放射光Ｘ線トポグラフィによるSOIウエハの同心円状パターンの解析,"
   精密工学会2004年度関西地方定期学術講演会, B-09,
   (関西大学, July 27-28, 2004).
6. 岡田 茂業，千代丸 誠，吉田 慎一，渡部 平司，安武 潔，遠藤 勝義,
   "Ｈ₂アニールしたｎ型4Ｈ-SiC（0001）表面の観察,"
   精密工学会2004年度関西地方定期学術講演会, B-08,
   (関西大学, July 27-28, 2004).
7. 三島 永嗣，志村 考功，安武 潔，梅野 正隆,
   "貼り合わせSOIウエーハの放射光X線トポグラフにおける同心円状パターンII,"
   2004年春季 第51回応用物理学関係連合講演会予稿集, 30a-ZG-8,
   (東京工科大学, March 28-31, 2004).
8. 辰村 光介，渡邉 孝信，志村 考功，梅野 正隆，大泊 巌,
   "熱成長SiO2膜に存在する残余秩序の熱履歴依存性,"
   2004年春季 第51回応用物理学関係連合講演会予稿集, 28p-C-10,
   (東京工科大学, March 28-31, 2004).

受賞 / Awards